Example embodiments of the inventive concept relate to a package-on-package device and a method of fabricating the same.
High-performance, high-speed and compact electronic systems are seeing increasing demand as the electronic industry matures. In response to such a demand, various semiconductor packaging techniques have been proposed. For example, methods have been suggested for stacking a plurality of semiconductor chips on a semiconductor substrate within a single package. Further, methods have been suggested for stacking a plurality of such packages to produce a so-called “package-on-package (PoP)” device. In particular, for the PoP device, a plurality of semiconductor chips or integrated circuits (ICs) may be provided in each package. Unfortunately and undesirably, this may increase the size, e.g. the width and/or length and/or thickness of the PoP device. Further, signal interconnection routing becomes more complex. Moreover, increased lengths of interconnection lines may result in technical difficulties, e.g. deterioration in a signal-quality and/or a power-delivery property of the device.
Thus, there is a need to meet the increasing demand for high-speed and compact electronic systems packaging without degrading overall device performance.